Display MCU
WT61P9
【 General Description 】 |
The WT61P9 is a microcontroller for flat panel display control and power management with 1) Turbo 8052 compatible CPU, 2) 64K bytes flash memory, 3) 1K+256 bytes SRAM, 4) 12 PWMs(8 8-bit PWMs and 4 10-bit LPWM), 5) DPMS detector(2 H/V inputs, Support H+V input, Programmable H/V(HOUT/VOUT) output polarity), 6) 6 timers and 4 UART Ports, 7) DDC/CI interface, 8) Master/Slave I2C interface, 9) 8 channel 10-bit A/D converter, 10) H/W IR receiver, 11) H/W CEC , 12) Real Time Clock, 13) Watch-dog timer, 14) Embedded ISP function, 15) Power down mode, 16) Embedded ICE mode. |
【 Features 】 | |
● | Embedded Turbo 8052 compatible CPU |
-Normal operation mode: 24MHz, 12MHz, 6MHz, 2MHz or 12MHz, 6MHz, 3MHz, 1MHz (Selectable Clock Sources) | |
-Instruction execution time : Min. =125ns at OSC=24Mhz, MAX=500ns (“MUL” & “DIV” instruction) | |
● | Memory: |
-Flash memory : 64K Bytes | |
-RAM: 1K+256 Bytes | |
● | 6 similar 8052 timer : Timer0, Timer1, Timer2, Timer3, Timer4, Timer5 |
● | 4 similar 8052 UART Ports, Support baud rate 115200 - 1200 at OSC=12/24MHz |
● | 2 HV sync processor |
-Support 2 H/V inputs, Support H+V input | |
-H/V frequency counter for monitoring DPMS | |
-H/V input polarity detector and programmable H/V(HOUT/VOUT) output polarity | |
● | 10-bit A/D converter with 8 selectable inputs and can accepted external reference voltage (max=3.3v) |
● | 8 8-bit PWM pin output and 4 10-bit selectable clock LPWM pin output |
● | Support 1 DDC/CI /slave I2C interface, and 1 master/slave I2C interface |
● | Hardware universal IR Receiver with 8 selectable inputs |
● | Embedded H/W CEC function (CEC pad supports open drain structure) |
● | Watch Dog timer |
● | Build-in RTC |
● | Power down mode |
-Selectable CPU clock sources | |
-Support “IDLE” mode and “OFF” mode | |
-CPU off mode can be waked up by external interrupt | |
● | Power consumption : |
-Typical 24mA at 24MHz mode | |
-Typical 8mA at 2MHz mode | |
-Typical 3mA at “IDLE” mode, only RTC alive mode | |
-Lower than 100uA at “OFF” mode | |
● | Maximum 53 programmable IO pins |
● | Build-in ISP function (IIC bus or UART bus) |
● | Embedded ICE mode with 8 break points (IIC bus or UART bus) |
● | Operation voltage: 3.6V – 3.0V (3.3V +/- 10%) (Tolerable IO structure – accept 5V signal input) |
● | Package |
-LQFP 64 |