WT58F032
【 General Description 】 |
The WT58F032 is a high-performance 32-Bit Microcontroller. It incorporates the 32-bit RISC CPU operating up to50 MHz, Flash memory up to 32K bytes and SRAM up to 4K bytes, and rich peripherals/interfaces such as high-speed ADC, high-speed PWM, current limit comparator, Quadrature Encoder Interface (QEI), I2C, SPI, UART and LIN bus. The WT58F032 is suitable for a wide range of applications, such as Brush-less DC motor (BLDC) control, AC induction motor control, switched reluctance (SR) motor control, digital power control, DC/DC, AC/DC, Inverters, PFC, washing machine, air conditioner, refrigerator, LED lighting control and applications where high computing power and high-speed communication are required. |
【 Features 】 | |
● | Embedded 32-bit RISC CPU core |
- 1.28 DMIPS/MHz (Dhrystone 2.1) performance | |
- Normal operating mode: 48 MHz, 24 MHz, 12 MHz, 6 MHz and 1 MHz | |
● | Memory: |
- Flash memory: 32K bytes (8K * 32) | |
- RAM: 4K bytes (1K * 32) | |
● | CPU clock source |
- External crystal oscillator 1 MHz ~ 24 MHz (Built-in PLL) | |
- Internal RC oscillator 12 MHz and 32 kHz (for IWDT) | |
- External crystal oscillator 32 kHz for RTC counter | |
● | Clock Management |
- ±2.0% internal oscillator | |
● | Internal RC oscillator can be calibrated ±1% with 32 kHz crystal and ±3% without 32 kHz crystal |
- Programmable PLLs and oscillator clock sources | |
- Independent Watchdog Timer (IWDT) | |
- Fast wake-up (less than 3us) and start-up | |
- Window Watchdog timer with system clock | |
- Fail-Safe Clock Monitor module detects clock failure and switches to internal RC oscillator | |
● | Power Management |
- Low-power management modes | |
- Integrated Power-on Reset and Low Voltage Detect | |
● | Program read out protection and code encryption |
● | High-Speed PWM Module |
- Up to four PWM pairs with independent timing (4 PWM generators with 8 outputs) | |
- Dead time for rising and falling edges | |
- PWM mode (True Independent Output, Complementary, Current Reset, Current Limit) | |
- Independent Fault/Current-Limit inputs for each of the PWM outputs | |
- Programmable Fault inputs | |
- Programmable output polarity | |
- Complementary or Independent Output modes | |
- Support 8 modes, including Edge and Center-Aligned modes | |
- Flexible trigger configurations for ADC conversions (Trigger from PWM to ADC) | |
- ‥Output override control | |
- Leading-Edge Blanking (LEB) functionality | |
● | High-Speed ADC Module |
- 10-bit resolution with one Successive Approximation Register (SAR) converters (1 Msps) | |
● | ±1 LSB accuracy at 5.0V |
- Up to 4 Sample & Hold (S&H) circuits (3: 4 inputs shared, 1: 13 input shared) | |
- Up to 13 input sources (one dedicated for temperature sensor) | |
- Dedicated result buffer for each analog input | |
- Flexible and independent ADC trigger sources (Trigger from PWM to ADC) | |
● | Six 16-bit Timer with IC/OC/OCN/PWM |
● | Quadrature Encoder Interface (QEI) |
- Phase A, Phase B and Index Pulse input | |
- 16-bit up/down position counter | |
- Count direction status | |
- Position Measurement (x2 and x4) mode | |
- Programmable digital noise filters on inputs | |
- Alternate 16-bit Timer/Counter mode | |
- Interrupt on position counter rollover/underflow | |
● | Comparators |
- A comparator is equipped with two channels (CMP0, CMP1) | |
- Negative-side input pins (CMP0M, CMP1M) and a positive-side input pin (CMP0P, CMP1P) can be connected | |
- CMP0M and CMP1M pin inputs and the internal generation reference voltage (6 combinations for each comparator) can be selected as the reference voltage | |
- The elimination width of the noise elimination digital filter can be selected | |
- An interrupt request is generated when an overvoltage is detected (INTCMP0 and INTCMP1) Interrupt on position counter rollover/underflow | |
- The output signal of comparator is connected to the PWM array unit and sets the PWM output pin to a non-active state | |
● | DMA: ADC, I2C (*2), UART (*4), TIMER (*6), SPI (*2) |
● | Communication interface |
- 1 master/slave I2C bus (SM bus) up to 1 MHz | |
- 1 master/slave SPI up to 12 MHz | |
- 2 UART up to 1.5 MHz | |
- LIN Bus | |
● | Power on reset and 8-level Low VDD Detector (LVD) |
● | Temperature sensor (±3℃) |
● | Support built-in ISP & ICE mode (2-wire JTAG mode) |
● | Tri-state I/O structure, input state can be decided by pad resister (pull high) |
● | Flash memory protection |
● | Power Consumption |
- Active Mode: 350uA/MHz | |
- Standby Mode: less than 6uA | |
● | Wide operating voltage: 3.0V ~ 5.5V |
● | Operating Conditions: |
- 3.0V to 5.5V, -40oC to +85oC, up to 50 MIPS | |
● | ESD protection HBM > 4KV, MM > 400V |
● | Package type: LQFP48, QFN40 |